PXI-6733 NI-DAQ terminal

PXI-6733 NI-DAQ terminal

These numbers apply to continuous waveform generation, which allows for the time it takes to reset the FIFO to the beginning when cycling through it. This additional time, about 200 ns, is not incurred when using host PC memory for waveform generation. Max update rate in FIFO mode does not change regardless of the number of devices in the system. † These results were measured using a PCI-6711/6713 device with a 90 MHz Pentium machine. These numbers may change when using more devices or when other CPU or bus activity occurs.

Transfer Characteristics
Relative accuracy (INL)
After calibration……………………..±2.2 LSB max
Before calibration …………………..±2.2 LSB max
DNL
After calibration……………………..±1.0 LSB max
Before calibration …………………..±1.0 LSB max
Monotonicity ……………………………..16 bits guaranteed after

calibration
Offset error
After calibration……………………..±168 μV max
Before calibration …………………..±40 mV max
Gain error (relative to internal reference)
After calibration……………………..±30 ppm of output max
Before calibration …………………..±9,000 ppm of output
max
Gain error (relative to
external reference)………………………+0.1% of output max, not
adjustable

Voltage Output
Ranges ………………………………………±10 V, ±EXT REF
Output coupling………………………….DC
Output impedance……………………….0.1 Ω max
Current drive………………………………±5 mA max
Output stability …………………………..Any passive load, up to
1,500 pF
Protection…………………………………..Short-circuit to ground
Power-on state ……………………………0 V (±200 mV)

External Reference Input
Range………………………………………..±11 V
Overvoltage protection………………..±25 V powered on,
±15 V powered off

Power Requirement
NI 6731
+5 VDC (±5%)……………………….0.80 A typ, 1.25 A max
+3.3 VDC (±5%)…………………….125 mA typ, 250 mA max
Power available at
I/O connector …………………………+4.65 to +5.25 VDC at 1 A
NI 6733
+5 VDC (±5%)……………………….1.25 A typ, 1.8 A max
+3.3 VDC (±5%)…………………….125 mA typ, 250 mA max
Power available at
I/O connector …………………………+4.65 to +5.25 VDC at 1 A