GE IS200PSCDG1ADB Turbine control PCB board

Product name:
GE IS200PSCDG1ADB Turbine control PCB board

Product model: IS200PSCDG1ADB

Quantity: inventory


Warranty: We provide warranty service for IS200PSCDG1ADB

Shipping Port:FuJian

Product technical documents: no relevant documents

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GE General Electric Technical Specifications: IS200PSCDG1ADB

MO-SBC1 can directly address additional 110 via two 16-

pin dip IS200PSCDG1ADB sockets(J2 andJ31. Oip connectorterminated cables

can interconnect user designed liD boards such as AlO

and 01 A converters, or UARTs and USARTs. The MO-SBC1

IS200PSCDG1ADB can access additional six 8-bit input and five 8-bit output

ports or devices in this manner. The control signals provided

at J3 are input and output select lines. They combine a

decoded port address with Z80’s port Read or Write and

timing signals. The Input Select lines (IS-2 through IS-71

apply directly to 3-state enable pins, which gate data to the

Oata In Bus(J2, 01-0, through 01-2); the Output Select lines

normally clock output port latches loaded by the Oata Out

Bus (J2, 00-0 through 00-71. Figure 3 shows examples of

external 110 port implementation.


brand Product Name Product model Order No
GE Fanuc Module card IS200PSCDG1ADB nothing
Place of Origin Marketable land Imported or not defects liability period
Europe and America Nationwide and overseas yes a year
Place of shipment Delivery method How to use Applicable industries
Xiamen Shunfeng Express Commissioning and installation Power Plant Steel Plant Cement Plant Shipboard Papermaking
Service advantages Foreign import, goods preparation and supply Reasonable price and reliable quality Pictures are for reference only
Product features Primary source of goods, supply by model After sales guarantee Chen 1810693-7731


IS200PSCDG1ADB A large number of external liD ports may be mUltiplexed

through the on-card MO-SBC1 liD ports. However, this

type of expansion requires more Processor execution time.

Each liD operation must be preceded by an output

instruction, which selects the port and followed by output

instructions, which provide the output strobes.

In this technique, one MO-SBC1 on-card input port and one

output port are committed for use as data in and out busses.

As required, other output port lines are used as liD port

select, port card select, and port strobes.


The MO-SBC1 has two low activated, level sensitive

interrupts with several designer options:


Figure 3

Nonmaskable Interrupt (NMII has the highest priority and

cannot be disabled.

Interrupt Request (IREal is enabledldisabled by the

(Ell/(Oll instructions. The user can select one of three

modes that define the action taken when IREa is


Mode 0 – Execute any instruction at Interrupt, but the

instruction must be supplied by the inter

rupting device to the data in bus (01 0-71, J2.

Mode 1 – Execute the RST 38H instruction.

Mode 2 – Restart at any memory address according to a

selected address vector (16 bitsl stored in two

memory locations. The interrupting device

must supply the first 8 bits of the restart

address vector. The page address is previously

loaded by the program.

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