GE IS200PSCDG1ABB Turbine control PCB board

Description

GE General Electric Technical Specifications: IS200PSCDG1ABB

The MD-SBCl is a complete l80 microprocessor system on

one 4.5 in. x 6.5 in. circuit card. The IS200PSCDG1ABB system provides a

56-pin card edge connector. The MD-SBCl offers the

capability of expanding program memory to 8192 bytes

using 2048 byte, MK2716 PROM. The MD-SBCl also

comes with 1024 bytes of IS200PSCDG1ABB readlwrite memory but can be

expanded to 2048 bytes by simply plugging in two additional

2114 RAMs. Included are three output ports and two input

ports at the card; however, 1/0 can be expanded to eight

input and output IS200PSCDG1ABB ports with a simple ribbon cable expansion

system that accesses the data bus and 1/0 decoder strobes.

The MD-SCBl operates from a single +5 V supply.

The IS200PSCDG1ABB MD-SBCl l80 Processor includes all of the 8080A

instructions as a subset. It also includes Bit, Relative, and

Indexed addressing modes, powerful data block search and

move instructions and a duplicate set of internal registers.

The MD-SBCl reduces program memory storage re

quirements and execution time significantly in many

applications.

ZSO/S080A COMPATIBILITY

The MD-SBCl instruction set offers the 8080A instructions

as a subset. 8080A programs execute normally in the MD

SBC1; however, the MD-SBCl has shorter time states.

Certain l80 instructions execute in a different number of

time states than identical8080A instructions. Consequently,

programmed timing adjustments may be necessary. Also,

three Flag Register bits that were unused and constant in

the 8080A are used by l80. The Parity Flag assumes the

dual role of Parity and Signed Binary Overflow with altered

action after add and subtract instructions. l80 Interrupt

Mode 0 is identical to the 8080A interrupt system.

The MD-SBCl executes 8085 programs except fOr those

containing Read Interrupt Mask (RIM) and Set Interrupt

Mask (SIM) instructions (with programmed timing ad

justments as required).

The l80 Processor executes 158 instructions compared to

the 8080A’s 72. The additional l80 instructions are

identified by first word HEX, a code of 1 0, 18, 20, 28, 30, 38,

CB, DD, ED or FD followed by 1, 2, or 3 words.

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