Description
GE General Electric Technical Specifications: IS200LSGIH1APR
The MDX-CPU3 is a STD-Z80 Bus compatible single board
computer with 64K bytes of dynamic RAM, 2K to 32K bytes
of ROM/EPROM, an RS232-C serial port, and an 8 bit
output port with handshake for IS200LSGIH1APR connection to a printer. The
CPU3 supports a very flexible memory map configuration by
the use of a memory configuration PROM. This allows the
RAM to be enabled/disabled in 2K byte increments and the
ROM/EPROM to be IS200LSGIH1APR mapped on 2K boundaries anywhere
in the 64K memory map. Each different map is selectable
under software control. Address, data, and control busses
are bidirectional to allow external masters to access
memory on CPU3 directly.
brand | Product Name | Product model | Order No |
GE Fanuc | Module card | IS200LSGIH1APR | nothing |
Place of Origin | Marketable land | Imported or not | defects liability period |
Europe and America | Nationwide and overseas | yes | a year |
Place of shipment | Delivery method | How to use | Applicable industries |
Xiamen | Shunfeng Express | Commissioning and installation | Power Plant Steel Plant Cement Plant Shipboard Papermaking |
Service advantages | Foreign import, goods preparation and supply | Reasonable price and reliable quality | Pictures are for reference only |
Product features | Primary source of goods, supply by model | After sales guarantee | Chen 1810693-7731 |
IS200LSGIH1APR I/O MAP PROM PROGRAMMING GUIDELINES
If it is desired to use port addresses other than those which
are supplied, then the following procedure should be used:
Each address in the I/O Map PROM corresponds
directly to a port address. The bits of the 4 bit control
word are defined as shown in Figure 4. Select the
desired port address and corresponding output bit
definitions for that address and program a new I/O
Map PROM with the new data.
Programming information for the serial channel and timers
can be found in the SERIAL TIMER INTERRUPT
CONTROLLER (ST!) Technical Manual, Mostek publication
number 4420250.
INTERRUPTS
The MDX-CPU3 will process external interrupts in theZ80-
CPU interrupt modes 0, 1, and 2. Internal (onboard)
interrupts can be processed only in modes 1 or 2.
SYSTEM RESET PRECAUTIONS
Oata in DYNAMIC RAM is not guaranteed to bevalid after a
PUSHBUTTON RESET has been initiated.
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Contact: Chen