MVME2700-3331 Emerson Motorola MVME 2700 Series CARD

The MVME2700-3331 contains shared onboard DRAM and secondary cache memory whose base address is software-selectable. Both the onboard processor and offboard VMEbus devices see this local DRAM at base physical address $00000000, as programmed by the firmware.

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Description

The MVME2700-3331 draws power from VMEbus backplane connectors P1 and P2. P2 is also used for the upper 16 bits of data in 32-bit transfers, and for the upper 8 address lines in extended addressing mode. The MVME2700-3331 may not function properly without its main board connected to VMEbus backplane connectors P1 and P2. Whether the MVME2700-3331 operates as a VMEbus master or as a VMEbus slave, it is configured for 32 bits of address and 32 bits of data (A32/D32). However, it handles A16 or A24 devices in the address ranges indicated in Chapter 2. D8 and/or D16 devices in the system must be handled by the PowerPC® processor software. Refer to the memory maps in Chapter 4.

The MVME2700-3331 contains shared onboard DRAM and secondary cache memory whose base address is software-selectable. Both the onboard processor and offboard VMEbus devices see this local DRAM at base physical address $00000000, as programmed by the firmware. This may be changed via software to any other base address. Refer to the MVME2700-3331 Series Single Board Computer Programmer’s Reference Guide for more information. If the MVME2700-3331 tries to access offboard resources in a nonexistent location and is not system controller, and if the system does not have a global bus timeout, the MVME2700-3331 waits forever for the VMEbus cycle to complete. This causes the system to lock up. There is only one situation when the system might lack this global bus timeout: when the MVME2700-3331 is not the system controller and there is no global bus timeout elsewhere in the system. Multiple MVME2700s may be installed in a single VME chassis. In general, hardware multiprocessor features are supported. Other MPUs on the VMEbus can interrupt, disable, communicate with, and determine the operational status of the processor(s). One register of the GCSR (global control/status register) set includes four bits that function as location monitors to allow one MVME2700-3331 processor to broadcast a signal to any other MVME2700-3331 processors. All eight registers are accessible from any local processor as well as from the VMEbus.

MVME2700-3331 PDF

MVME2700-3331

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