Name: MVME165-04
Price: 5433 CNY
Availability: InStock

Description

VME Subsystem Bus (VSB)
The VME Subsystem Bus is implemented on the MVME165 to support multiprocessor systems by providing a secondary data transfer path. It includes a multiplexed asynchronous data transfer bus which allows the MVME165 to access data stored in slaves. Four types of bus cycles are possible; an address-only cycle, a single-transfer cycle, a block-transfer cycle. and an interrupt-acknowledge cycle. The interface to the VSB bus is implemented with the MVSB2400 (VSBchip).
The control and status register is used to control and configure the operation of the VSBchip as well as allow the MC68040 to monitor status information regarding the VSB. The block-transfer byte-count register allows the CPU to control the number of bytes transferred during a VSB block-transfer cycle. Master blOCk-transfers should not be performed by the MVME165. Slave block-transfers are supported. Circuitry to access the address-decode register is not implemented on the MVMEI65. therefore; the base address for the VSBchip registers can not be changed from what is shown in Table 4-1.
Interrupt Processing
The MVME16S supports 19 interrupt requests to the processor. The interrupt requests are prioritized by the interrupt handler circuitry on the LRC into seven interrupt request levels with six prioritized groups per level. The prioritization is such that any higher level interrupt will take precedence over any lower level interrupt, and any higher group interrupt on a given level will take precedence over any lower group interrupt on the same level. The interrupt sources and their prioritizations are given in Table 4-9. Level 7 is the highest priority and levell is the lowest. The LRC provides a unique interrupt vector for all interrupts except Group 1 interrupt and (IRQ5G2 (DRTIRQ) and IRQ4G2 (VSBIRQ». refer to the Interrupt Handler and Interrupt Control and Status Register sections for further information. The interrupt vectors for the group 1 VMEbus interrupts are passed on to the MC68040 by the VMEchip. The VMEchip Utility interrupts are generated for locally detected conditions and the VMEchip provides the vector based on contents of the Utility Interrupt Vector Register and the source of interrupt. The Interrupt Handler Mask Register and the Interrupt Mask Register provide individual masking capability.

MVME165-04 PDF

MVME165-04

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