MVME165-02 Motorola VME/VSB Microcomputer original

The MVME165-02 microcomputer is a VMENSB-based CPU engine, utilizing the Motorola MC68040 microprocessor. The MC68040 microprocessor features 8Kb of internal cache, a floating point unit, and a memory management unit.

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Description

General Description
The MVME165-02 microcomputer is a VMENSB-based CPU engine, utilizing the Motorola MC68040 microprocessor. The MC68040 microprocessor features 8Kb of internal cache, a floating point unit, and a memory management unit. The MVME165-02 includes the MC68681 DUART for serial I/O and software timing, the Local Resource Controller (LRC) for local CSR, counter/timers. local resource decode and control, and interrupt handling; a full VMEbus 32-bit master/slave interface, a VMEbus interrupt bandler, interrupter, system controller and a global register set (MVME6000); a full VSB bus master/slave interface (MVSB2400); two 32-pin JEDEC standard sockets for EPROM, ~ne 28-pin JEDEC socket for Time-Of-Day ClockINonVolatile RAM (TOD/NVRAM). and a 4/16Mb DRAM array. Address Map The physical address map for the MVME165 is provided in Table 3-2. The top 64Kb of the address map (FFFFOOOO-FFFFFFFF) is allocated for the VMEbus Short I/O. The 64Kb address range atFFFEOOOO through FFFEFFFF (replicated) is allocated to the local CSR (Control Status Register). The 64Kb address range at FFFDOOOO through FFFDFFFF (replicated) is allocated to the DUART. The 64Kb address range at FFFCOOOO through FFFCFFFF (replicated) is allocated to the local Time-of-Day Clock and Non-Volatile static RAM. The 64Kb address range at FFFBOOOO through FFFBFFFF (replicated) is allocated to the VMEchip’s CSR. The 64Kb address range at FFFAOOOO through FFFAFFFF is allocated to the VSBchip’s CSR. The 64Kb address range at FFF90000 through FFF9FFFF (replicated) is allocated to the LRC (Local Resource Controller). The 4Mb address range at FF800000 through FFBFFFFF is allocated to the ROM.

It is up to the software running on the MVME165 to make sure that the MC68040 treats the I/O resources of the board like I/O and not like memory. If not instructed otherwise,the MC68040 will use its highest-performance modes and will cache accesses to the I/O devices. resulting in improper operation.
One way to ensure proper I/O operation is to map the MVME165-02’s 110 resources as noncacheable. serialized using the MC68040’s OTTO or DTTI registers. For example, the I65Bug debugger initializes the DTTI register with a value to be treated as noncacheable. serialized. The address range area from 00000000 through FF7FFFFF is for the YSB. YMEbus resources. and local DRAM. This address area can be allocated differently depending on the state of the bus mode select bit (VSBMD) and the YSB enable bit (YSBEN) of the CSR within the LRC. These bits are described in the Bus Control Register section.
The address map as it exists with each state of this bit is illustrated in Figures 4-2, 4-3, and 4-4. Figure 4-2 represents the system address map for the MVMEI65 when the board is in the VSB priority mode (VSBMD = 0, VSBEN = 1; note that these two bits are in the LRC CSR). If the VSBchip is enabled and set for bounce mode (these control bits are in the YSBchip), then all accesses that can be reached via the YSB bus will proceed unless no slave responds. Figure 4-3 shows the MVME165 system address map when the bus select bit is asserted (VSBMD = 1. YSBEN = 1; note that these two bits are in the LRC CSR). In this mode some accesses are assumed to be addressed to the correct bus. and no “bounce” will be performed. When accessing address range 0 to 7FFFFFF or EOOOOOOO through E3FFFFFF, accesses go to the VSB first (if the YSBchip is enabled).
Figure 4-4 shows the MVME165-02 system address map when the bus select bit is negated (VSBMD = don’t care, VSBEN = 0; note that these two bits are in the LRC CSR). In this mode some accesses are assumed to be addressed to the correct bus, and no “bounce” will be performed. When accessing address range 0 to 7FFFFFF. accesses go to the VSB first (if the VSBchip is enabled).

For Figure 4-3, if no slaves responds, then the accesses bounce to the VMEbus. When accessing address range 80000000 through DFFFFFFF or E4000000 through FF7FFFFF, it goes to the VMEbus directly and no bounce is performed. Details of the address map and the resources are given in the following sections. All address references are given as physical addresses at the output side of the MC68040’s MMU.

 

MVME165-02 Motorola
MVME165-02

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