Description
VME System Controller
The MVME162P-344E board is factory-configured in “automatic” system controller mode with a jumper across J1 pins 2-3. In this configuration, the MVME162P-344E determines whether it is the system controller by its position on the bus. If the board is located in the first slot from the left, it configures itself as the system controller. When the board is operating as system controller, the SCON LED is turned on. If you want the MVME162P-344E to function as system controller in all cases, move the jumper to pins 1-2. If the MVME162P4 is not to be system controller under any circumstances.
Note :On MVME162P-344E boards without the optional VMEbus interface (i.e., with no VMEchip2 ASIC), the jumper may be installed or removed with no effect on normal operation.
MC2 DRAM Size
The two memory controllers modeled in the Petra ASIC duplicate the functionality of the “parity memory controller” found in MC2 ASICs as well as that of the “single-bit error correcting/double-bit error detecting” memory controller found in MCECC ASICs. Board firmware will initialize the memory controller as appropriate. If the Petra ASIC is supporting MVME1X2P4 functionality, firmware will enable the parity (MC2) memory controller model. If the Petra ASIC is supporting MVME1X2P2 functionality, firmware will enable either the parity or the MCECC memory controller model, depending on the board configuration. Board configuration is a function of switch settings and resistor population options. S3 comes into play in the MC2 memory controller model. S3 is a foursegment slide switch whose lower three segments establish the size of the parity DRAM (segment 4 is not used.) Refer to the illustration and table below for specifics.
Notes: As shown in the preceding table, the Petra/MC2 interface supports parity DRAM emulations up to 16MB. For sizes beyond 16MB, it is necesary to use the MCECC memory model.
Data Bus Structure
The local bus on the MVME162P4 is a 32-bit synchronous bus that is based on the MC68040 bus, and which supports burst transfers and snooping. The various local bus master and slave devices use the local bus to communicate. The local bus is arbitrated by priority type; the priority of the local bus masters from highest to lowest is: 82596CA LAN, 53C710 SCSI, VMEbus, and MPU. As a general rule, any master can access any slave; not all combinations pass the common sense test, however. Refer to the MVME1X2P4 VME Embedded Controller Programmer’s Reference Guide and to the user’s guide for each device to determine its port size, data bus connection, and any restrictions that apply when accessing the device
Microprocessor
MVME162P4 models may be ordered with an MC68040 or MC68LC040 microprocessor. The MC68040 has on-chip instruction and data caches and a floating-point processor. (A floating-point coprocessor is the major difference between the MC68040 and MC68LC040.) Refer to the MC68040 user’s manual for more information.

MVME162P-344E pdf
MOTOROLA VME MVME 162P-344E Embedded Controller Board
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