The MVME133SA-20A may be used by itself or with other VMEbus controllers. The MVME133 is not intended to be used as an Intelligent Peripheral Controller (IPC). It is intended to be used as a VMEbus master.
Whether the MVME133SA-20A operates as a VMEbus master or as a VMEbus slave, it is configured for 24 bits of address and 32 bits of data (A24/D32). Many VME chassis are A24/D16 or A32/D32. The MVME133SA-20A is configured as a 16-bit data port or as a 32-bit data port depending on address alignment on a longword boundary, and the status of address bit A24. Refer to theory details in Chapter 4. There can also be system problems with bus error (BERR*) and Read-Modify-Write (RMW) cycles. These details are also discussed in Chapter 4.
The MVME133SA-20A uses the address modifier lines in such a way that it responds to short or standard addressing (AM = $3E, $3D, $3A, $39, $20, or $29) when it is a VMEbus master, but only to standard addressing (AM = $3E, $3D, $3A, or $39) when it is a VMEbus slave.
Note that the MVME133SA-20A contains no parallel ports. To use a parallel device, such as a printer, with the MVME133SA-20A, it is necessary to add a module such as the MVMEos0 System Controller Module to your system.
The MVME133SA-20A may be used by itself or with other VMEbus controllers. The MVME133 is not intended to be used as an Intelligent Peripheral Controller (IPC). It is intended to be used as a VMEbus master.
Whether the MVME133SA-20A operates as a VMEbus master or as a VMEbus slave, it is configured for 24 bits of address and 32 bits of data (A24/D32). Many VME chassis are A24/D16 or A32/D32. The MVME133SA-20A is configured as a 16-bit data port or as a 32-bit data port depending on address alignment on a longword boundary, and the status of address bit A24. Refer to theory details in Chapter 4. There can also be system problems with bus error (BERR*) and Read-Modify-Write (RMW) cycles. These details are also discussed in Chapter 4.
The MVME133SA-20A uses the address modifier lines in such a way that it responds to short or standard addressing (AM = $3E, $3D, $3A, $39, $20, or $29) when it is a VMEbus master, but only to standard addressing (AM = $3E, $3D, $3A, or $39) when it is a VMEbus slave.
Note that the MVME133SA-20A contains no parallel ports. To use a parallel device, such as a printer, with the MVME133SA-20A, it is necessary to add a module such as the MVMEos0 System Controller Module to your system.
A single resistor package, SIP, with four 120-ohm resistors, may be needed at R23 for proper and reliable system operations with the RS-485 port (port A). In systems where RS-485 multi-drop cable is used to connect many RS-485 ports (e.g., many MVME133s), noise on the cable may be read as spurious data and/or cause undesired interrupts unless the cable is terminated properly. The recommended method is to terminate each of the two ends of the cable with a 120-ohm resistor. For systems using MVME133s, proper termination can be accomplished by installing an eight-pin resistor pack with four 120-ohm resistors (actually, any value between 90 and 150 ohms is acceptable) at R23 on two of the MVME133 modules, one at each end of the RS-485 cable. Termination may also be required if devices connecting to the MVME133SA-20A RS-485 port may be OFF or not online when the RS-485 port is enabled.
There may be some software problems using the MVME133SA-20A, caused by mask errors in the MC68020 chip. Check the mask number of the MC68020 on your MVME133SA-20A, and refer to Appendix A for the appropriate problem discussion.
1 INTRODUCTION
This chapter provides the necessary information to use the MVME133SA-20Amodule in a system configuration. This includes controls and indicators, and memory map details.
2 CONTROLS AND INDICATORS
The MVME133 module has ABORT and RESET switches, and FAIL, HALT, and RUN indicators, all of which are located on the front panel of the module.
2.1ABORT Switch S1
The ABORT switch is debounced and brought into the interrupt handler as a level seven interrupt. Refer to the interrupt handler description in Chapter 4 for details.
2.2 RESET Switch S2
The front panel RESET switch resets all onboard devices (including the MPU) and drives SYSRESET* low if the MVME133 is the system controller. (The MVME133 also drives SYSRESET* low at power up if it is configured as the system controller. Refer to the reset description in Chapter 4 for details.)
2.3 FAIL, HALT, and RUN Indicators DS1, DS2, and DS3
There are three LEDs on the MVME133SA-20A: RUN, HALT, and FAIL. RUN is on (green) when [AS*] is low. HALT is on (red) when reset (any reset except the RESET instruction from the MPU) is true or when the [HALT*] line is low. FAIL is on (red) when the [BRDFAIL] line is high. Table 3-1 describes the module status for all possible combinations of these LEDs.
3 MVME133 MEMORY MAPS AND MAP DECODER
At the beginning of each MPU cycle, the map decoder determines what kind of cycle takes place and which device is selected within that cycle type. Cycle types are determined by the function code lines FC2-FCO, which are driven by the MC68020. Table 3-2 shows the cycle types and the devices that respond.
3.1 CPU Space Memory Map
The MVME133 responds to two types of CPU cycles: Coprocessor and Interrupt Acknowledge (IACK). Note that the MC68020 is capable of generating other types of CPU space cycles (using Breakpoint Acknowledge, Access level control, or MOVES instructions) which the MVME133 does not support.
3.2 Coprocessor Interface Register Map
The only coprocessor on the MVME133 module is the MC68881 Floating Point Coprocessor. The map decoder selects the MC68881 any time the MPU executes a coprocessor cycle (FC2-FCO = %111 and A19-A16 = %0010). The recommended Coprocessor ID (Cp-ID) (bits 9-11 of the coprocessor instruction word) for the MC68881 is binary %001. However, the MVME133 selects the MC68881 regardless of what the Cp-ID is. The MC68881 registers are addressed by the A04-A01 as shown in Table 3-4.
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